TechVault
eMMC + UFS (Managed NAND)
Description
For system designs with mass storage needs, developers must keep up with the increasingly complex error correction code (ECC) implementation and data management requirements of MLC NAND flash devices. Micron’s e.MMC memory can help developers overcome these challenges, offering quick system integration suited for a wide range of automotive, industrial and consumer applications. How e.MMC Memory Works Micron’s e.MMC memory combines a NAND flash memory device with a JEDEC-compliant controller in an industry-standard BGA package. This single-package solution manages operations—such as wear leveling, bad block management and device mapping— internally, simplifying system development work. e.MMC also implements error handling internally, which removes the burden from the host processor, thereby optimizing system performance.
Features
- Density - eMMC: 32-128GB, UFS: 32-512GB
- Ballout and package - Industry-standard 153-ball BGA JEDEC-standard 100-ball BGA for easy routing
- Sequential write - Up to 20/23 MB/s Up to 90/120 MB/s
- Sequential read - Up to 44/130 MB/s Up to 270/320 MB/s
- Random write - Up to 100/1000 IOPS Up to 5000/15,000 IOPS
- Random read - Up to 1100/3500 IOPS Up to 5000/15000 IOPS
- Temperature - Industrial (–40˚C to 85˚C), Automotive (–40˚C to 105˚C)